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Jul 15, 2020High-Quality DesignWare Interface and Processor IP for Efficient Real-Time Connectivity and Machine Learning Processing Accelerate Design Schedule and Lower Risk
Highlights: Tenstorrent achieved first-pass silicon success for its Grayskull AI processor SoC using DesignWare PCI Express 4.0, ARC HS48 Processor, and LPDDR4 IP PCI Express 4.0 controller and PHY IP
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Jun 3, 2020Successful Tapeout of the DesignWare USB4 PHY Test Chip on 5nm Process Reduces Risk and Accelerates Time-to-Market for SoCs Supporting the 40 Gbps USB Specification
Highlights DesignWare USB4 IP solution, including controllers, routers, PHYs, and verification IP, supports all features in the USB4 specification Support for USB4, DisplayPort with HDCP 2.3...
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May 28, 2020DesignWare DDR IP Delivers High Performance Memory Interface for Compute-Intensive Artificial Intelligence Applications in Multiple Silicon Processes Including 7-nm
Highlights: Synopsys' high-quality DesignWare DDR PHY IP provides NVIDIA unmatched performance, latency, and power efficiency DDR PHY supporting multiple DIMMs per channel for DDR5/4 addresses...
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Apr 28, 2020Unique platform delivers automation and visualization for 2.5D/3D package design and implementation, with power, thermal, and noise-aware optimization
Highlights: Built on Synopsys' Fusion Design Platform, world-class engines and data model, 3DIC Compiler offers a consolidated end-to-end solution with a full array of capabilities for advanced...
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Apr 13, 2020ZeBu's Performance Enabled First Silicon Success of Tensor Streaming Processor Architecture
Highlights ZeBu provides scalable emulation capacity for full chip emulation of Groq's multi-billion gate Tensor Streaming Processor High-performance and reliability enable running many billions...