Synopsys Custom Design Solution Qualified for TowerJazz Analog/Mixed-Signal Power Management Reference Flow
Collaboration Delivers Comprehensive Power Management Solution Based on Synopsys Galaxy Custom Designer and TowerJazz 180-nm iPDK

MOUNTAIN VIEW, Calif., and MIGDAL HAEMEK, Israel, November 17, 2010— Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and TowerJazz (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry leader, today announced that they have collaborated to qualify Synopsys’ custom design solution with TowerJazz’s 180-nanometer (nm) power management (PM) interoperable process design kit (iPDK) and analog/mixed-signal (AMS) PM reference flow. The qualified solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit simulation, CustomSim™ FastSPICE simulation, and StarRC™ parasitic extraction tools. The TowerJazz AMS PM Reference Flow with the 180-nm iPDK provides mutual customers with a comprehensive, productive and open custom design solution.


“TowerJazz and Synopsys have been working together to create and promote iPDKs as an open standard for the custom design community so engineering teams only need to develop a single PDK for each process node, reducing development costs and design cycle times,” said Ori Galzur, vice president of design center and design enablement at TowerJazz. “Synopsys’ world-class team provided TowerJazz with on-site iPDK training as well as expertise in iPDK interoperability and validation methodologies. This collaboration further expands our relationship to offer a comprehensive, open analog/mixed-signal design solution.”


The TowerJazz AMS PM Reference Flow includes a reference design that is based on the TowerJazz 180-nm iPDK and a set of documentation that covers the overall flow as well as the detailed reference flow steps. Mutual customers can quickly learn the complete power management design flow including schematic capture, simulation, layout, physical verification and extraction. In addition, important productivity features are highlighted to help designers complete their designs on time and help ensure first pass silicon success.


“We welcome TowerJazz’s leadership in adopting the iPDK standard and applying it to their advanced power management process and reference flow,” said Bijan Kiani, vice president of product marketing at Synopsys. “Through this partnership, we can ensure that our mutual customers achieve fast turnaround time from design specification to production.”


About TowerJazz 180-nm Power Management Process and Features

TowerJazz’s 180-nm power management process is a cost-effective solution which offers modular add-ons such as a unique zero-mask-adder, multi-programmable, non-volatile memory (NVM) solution, thick copper-top metallization for high current drive, and an optional 1.8-volt (V) gate for heavy digital power management integrated circuits (ICs). In addition, it offers scalable LDMOS devices that provide excellent area optimization of the power devices for up to 60 volts, all with very low mask count.


About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at


Synopsys, CustomSim, Galaxy Custom Designer, HSPICE and StarRC are registered trademarks or trademarks of Synopsys, Inc.  Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.


About TowerJazz

Tower  Semiconductor  Ltd. (NASDAQ: TSEM, TASE: TSEM), the global specialty foundry  leader  and  its fully owned U.S. subsidiary Jazz Semiconductor, operate collectively under the brand name TowerJazz, manufacturing integrated circuits  with geometries ranging  from  1.0  to  0.13-micron. TowerJazz provides industry leading design enablement tools to allow complex designs to be achieved quickly and more accurately and offers a broad range of customizable process technologies including SiGe, BiCMOS, Mixed-Signal and RFCMOS, CMOS Image Sensor, Power Management (BCD), and Non-Volatile Memory (NVM) as well as MEMS capabilities. To provide world-class customer service, TowerJazz maintains two manufacturing facilities in Israel and one in the U.S. with additional capacity available in China through manufacturing partnerships. For more information, please visit


Safe Harbor Regarding Forward-Looking Statements

This press release includes forward-looking statements, which are subject to risks and uncertainties.  Actual results may vary from those projected or implied by such forward-looking statements.  A complete discussion of risks and uncertainties that may affect the accuracy of forward-looking statements included in this press release or which may otherwise affect Tower and/or Jazz’s business is included under the heading "Risk Factors" in Tower’s most recent filings on Forms 20-F, F-3, F-4 and 6-K, as were filed with the Securities and Exchange Commission (the “SEC”) and the Israel Securities Authority and Jazz’s most recent filings on Forms 10-K and 10-Q, as were filed with the SEC, respectively. Tower and Jazz do not intend to update, and expressly disclaim any obligation to update, the information contained in this release.


For TowerJazz                                                                         For Synopsys


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