DesignWare IP Provides Standardized Interface Between USB 3.0 Host Controllers and USB 3.0 Software Stack

MOUNTAIN VIEW, Calif., Feb. 4 /PRNewswire-FirstCall/ -- Synopsys, Inc. , a world leader in software and IP for semiconductor design and manufacturing, today announced the addition of the DesignWare® SuperSpeed USB xHCI Host Controller to the complete DesignWare SuperSpeed USB (USB 3.0) IP solution consisting of device and host controllers, PHY and verification IP. The complete solution also includes a SuperSpeed USB virtual platform and drivers to aid software development. The SuperSpeed USB xHCI Host Controller supports the current Extensible Host Controller Interface (xHCI) draft specification, which offers a standardized method for communication between USB 3.0 host controllers and the USB 3.0 software stack.

The DesignWare SuperSpeed USB xHCI Host Controller, operating at 5 Gbps, is targeted at high performance netbooks, set-top boxes, digital video recorders, digital TVs, and mobile internet devices that want to take advantage of SuperSpeed USB's 10x increase in throughput. To help ensure interoperability with multiple operating systems, standard off-the-shelf USB 3.0 xHCI software stack drivers can be used with the DesignWare SuperSpeed USB xHCI Host Controller, allowing designers to focus on developing differentiated features and spend less effort on software development. Additionally, the DesignWare SuperSpeed USB xHCI Host Controller can be configured to support multiple ports, enabling designers to implement their required configuration without having to manually modify their existing source code.

"Synopsys is an active member of the USB Implementer Forum, and we commend their continued contribution to the advancement of the SuperSpeed USB ecosystem," said Jeff Ravencraft, president and chairman, USB Implementers Forum. "The addition of the xHCI Host Controller to the DesignWare SuperSpeed USB IP offering will enable Synopsys customers to quickly deploy SuperSpeed USB products to the design community."

The DesignWare SuperSpeed USB xHCI Host Controller is optimized for low power consumption to extend product battery life, implementing dual power rails to allow nearly the entire core to be completely turned off while in suspend mode. The controller's low power design information is provided in the industry standard Unified Power Format (UPF), enabling designers to use the Synopsys' Eclypse™ Low Power Solution to automatically implement aggressive power management schemes for dynamic and leakage power.

"As a leading provider of USB IP for nearly a decade, Synopsys continues to develop high quality IP that helps designers lower the risk and cost of implementing the latest USB 3.0 connectivity into their system-on-chip designs," said John Koeter, vice president of marketing for the Solutions Group at Synopsys. "With the addition of the xHCI Host Controller to our DesignWare SuperSpeed USB IP offering, designers can turn to a single, trusted vendor for an integrated USB 3.0 IP solution for their design needs."

Availability

The DesignWare SuperSpeed USB xHCI Host Controller is scheduled to be available to early customers in Q2 2009. For more information on DesignWare USB IP, please visit: http://www.synopsys.com/IP/InterfaceIP/USB/Pages/default.aspx

Also, visit the USB IP blog at http://www.synopsysoc.org/tousbornottousb/

About DesignWare IP

Synopsys offers a broad portfolio of high quality, silicon-proven digital, mixed-signal and verification IP for system-on-chip designs. As a leading provider of connectivity IP, Synopsys delivers the industry's most comprehensive solutions for widely used protocols such as USB, PCI Express, SATA, Ethernet and DDR. In addition to connectivity IP, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon development of software. When combined with a robust IP development methodology, extensive investment in quality and comprehensive technical support, DesignWare IP enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit http://www.synopsys.com/designware

About Synopsys

Synopsys, Inc. is the world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Forward-Looking Statements

This press release contains forward-looking statements within the meaning of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, including statements regarding the potential market demand, expected benefits, availability, and performance characteristics of the DesignWare SuperSpeed USB IP solution. These statements are based on current expectations and beliefs. Actual results could differ materially from those described by these statements due to risks and uncertainties including, but not limited to, unforeseen market forces, engineering difficulties, uncertainties attendant to any new product offering, discontinuation of the collaboration between Synopsys and MCCI and other risks as identified in the section of Synopsys' Annual Report on Form 10-K for the fiscal year ended October 31, 2008, and any subsequent forms 10-Q, entitled "Risk Factors."

Synopsys, DesignWare and Eclypse are registered trademarks or trademarks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

    Editorial Contacts:

    Sheryl Gulizia
    Synopsys, Inc.
    650-584-8635
    sgulizia@synopsys.com

    Lisa Gillette-Martin
    MCA, Inc.
    650-968-8900 x115
    lgmartin@mcapr.com

SOURCE: Synopsys, Inc.

Web site: http://www.synopsys.com/