The Industry's Most Comprehensive Suite of Proven Tools, IP, Methodologies and Services Enables Broad Adoption of Advanced Low Power Design Techniques
MOUNTAIN VIEW, Calif., Feb. 25 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the Synopsys Eclypse™ Low Power Solution, the industry's most comprehensive suite of proven system-level, verification, implementation and signoff tools, intellectual property (IP), methodologies and services for low power chip development. The Eclypse solution aligns Synopsys' proven offerings into a streamlined, easy-to-use low power workflow that encompasses each phase of the design process. As a result, the Eclypse solution enables design teams to adopt advanced low power techniques while boosting productivity, reducing risk and ultimately delivering high quality silicon in an effort to meet or beat power, area, speed and yield objectives. To educate customers on the benefits of the Eclypse solution, Synopsys will host a series of low power seminars around the world.
Advanced low power design techniques, such as MTCMOS power gating, multi- voltage, and dynamic voltage and frequency scaling (DVFS), force a major shift in how engineers create and verify chips. These techniques can dramatically reduce power consumption in deep submicron chips but have traditionally required ad-hoc, time-consuming, risk-prone, and manual verification and implementation approaches. The Eclypse Low Power Solution combines a wide array of advanced techniques, methodologies, standards, and automation to simplify advanced low power design and verification.
Building on more than 10 years of low power design leadership, the Eclypse Low Power Solution delivers several new, advanced low power technologies. Enhanced clock gating and low power clock-tree synthesis allow designers to optimize their clock structures for low power while also achieving required skew and timing goals. Advanced multi-threshold leakage optimization, which constrains the ratio of Vt, options utilized, provides optimal leakage power recovery independent of a design's process corners. Enhanced automation for power switch insertion and optimization enables power planning exploration and "what-if" analysis using IR drop and area constraints.
The Eclypse solution supports the industry-standard Unified Power Format (UPF) language, which is used to capture low power design requirements. The following UPF-enabled tools are included: MVRC™ and VCS® with MVSIM™, key components of the Discovery™ Verification Platform, and Design Compiler®, Power Compiler™, IC Compiler™, DFT MAX™, Formality®, and PrimeTime®, key components of the Galaxy™ Design Platform. Completing the solution are additional tools for low power design, including Innovator™, HSPICE®, HSIM®, NanoSim®, TetraMAX®, and PrimeRail™, as well as DesignWare® IP and Synopsys Professional Services. The Eclypse solution supports open methodologies, including those described in the "Low Power Methodology Manual" (LPMM), co-authored by Synopsys and ARM.
"ARM has always been at the forefront enabling low power electronic products. Our innovative collaborations with Synopsys have helped advance the state of the art in power management techniques, resulting in enhancements to IP, tools and methodologies that enable mainstream designers to achieve their targets," said John Goodenough, director of Design Technology, ARM. "Synopsys' Eclypse Low Power Solution, together with ARM physical and processor IP, can significantly reduce consumer product power consumption as proven through our numerous silicon technology demonstrators described in the Low Power Methodology Manual [Springer]."
"We have had great success with Synopsys' VCS with MVSIM low power verification solution on complex designs with as many as 20 power domains," said Hisaharu Miwa, general manager of the Design Technology Division at Renesas Technology Corp. "In such cases, the unique capabilities of VCS with MVSIM consistently identified power management bugs that other solutions missed. We have seen a five to 10 times turnaround time improvement in the verification step and have incorporated it into our low power verification flow. Now that VCS with MVSIM is part of the Eclypse solution, we can take better advantage of synergies with other power-aware Synopsys products."
"The Eclypse Low Power Solution is the result of an intensive, multi-year effort to create the industry's most comprehensive and silicon-proven solution for low power chip development," said George Zafiropoulos, vice president of Solutions Marketing at Synopsys. "With Eclypse, Synopsys has aligned its proven low power tools, IP, methodologies and services into an easy-to-use solution so that design teams can quickly and confidently adopt the most advanced low power techniques."
Eclypse Low Power Seminar Series
Synopsys will conduct a series of Eclypse Low Power Seminars in which ARM will participate. These seminars are designed to help chip development teams understand how they can employ the latest advanced low power design techniques with the Eclypse solution. The seminars will include an overview of the Eclypse solution and detail key elements of an automated low power design workflow. Synopsys is a member of the ARM Connected Community. For information on a seminar near you, please visit http://www.synopsys.com/eclypse.
Pricing and Availability
The Eclypse Low Power Solution with UPF support is available today. Pricing is based on configuration.
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
Synopsys, Eclypse, VCS, MVSIM, MVRC, Discovery, Design Compiler, Power Compiler, IC Compiler, DFT MAX, Formality, Galaxy, Innovator, HSIM, NanoSim, HSPICE, PrimeTime, PrimeRail, and DesignWare are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.
650-968-8900, ext. 115
SOURCE: Synopsys, Inc.
CONTACT: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635,
email@example.com, or Lisa Gillette-Martin of MCA, Inc., +1-650-968-8900,
ext. 115, firstname.lastname@example.org, for Synopsys, Inc.
Web site: http://www.synopsys.com/