MOUNTAIN VIEW, Calif., Jan. 21 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced that IC Compiler was used in a 45-nanometer (nm) system-on-chip (SoC) device of which Matsushita Electric Industrial Co., Ltd., the consumer electronics company behind the globally recognized Panasonic brand, has completed the tapeout, and which is entering volume production. In addition to IC Compiler, Synopsys' comprehensive place-and- route solution, Matsushita used Synopsys' Design Compiler® solution for high-quality RTL synthesis, and the PrimeTime® SI timing analysis solution and Star-RCXT™ extraction tool for silicon-accurate sign-off. Using the latest technologies in Synopsys' Galaxy™ Design Platform, Matsushita was successful in meeting their goals for smaller die size and lower power consumption required for its advanced consumer electronics SoC design.

"Design productivity and power consumption are important problems in SoCs for consumer applications," said Hakuhei Kawakami, director at Corporate System LSI Division, Semiconductor Company, Matsushita Electric Industrial Co., Ltd. "We expect Synopsys to deliver advanced technology for the nanometer process. Synopsys synthesis, sign-off and place-and-route solutions have been deployed in Matsushita's 45-nm design."

Consisting of more than 250 million transistors, this 45-nm device integrates three to four times more logic than its predecessor. Matsushita turned to IC Compiler for its XPS (extended physical synthesis) technology, which accelerates timing closure by extending physical synthesis to full place-and-route. In addition, IC Compiler provided tight correlation to sign- off using PrimeTime SI for timing analysis and Star-RCXT for extraction. Based on this silicon success, Matsushita is actively deploying IC Compiler on a broad range of designs. Matsushita has also moved to the latest technology in RTL synthesis by making Design Compiler topographical technology a standard part of their flow.

"Over the years, Synopsys has invested heavily in research and development at each new technology node from 90 nanometers to 65 nanometers and beyond,'' said Antun Domic, senior vice president and general manager of Synopsys' Implementation Group. "It's exciting to be associated with the industry's first publicly announced 45-nanometer consumer design. We congratulate Matsushita on their success, and we plan to continue working closely with them for the mutual benefit of both companies by extending the advanced design capabilities of the Galaxy Design Platform."

About IC Compiler

IC Compiler is Synopsys' comprehensive place-and-route solution. It provides superior results and faster time-to-results by extending physical synthesis to full place-and-route, and by enabling signoff-driven design closure. Older solutions have a limited horizon because placement, clock tree, and routing are separate, disjointed operations. IC Compiler's XPS technology breaks down the walls between these steps by extending physical synthesis to full place-and-route. IC Compiler has a unified, TCL-based architecture that implements innovations and harnesses some of the best Synopsys core technologies. It is a complete place-and-route system with everything necessary to implement next-generation designs, including physical synthesis, placement, routing, timing, signal integrity (SI) optimization, power reduction, design-for-test (DFT), and yield optimization.

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Synopsys, Design Compiler, Galaxy, PrimeTime and Star-RCXT are registered trademarks or trademarks of Synopsys, Inc. Any other trademarks mentioned in this release are the intellectual property of their respective owners.

  NEWS RELEASE
  Editorial Contacts:
  Sheryl Gulizia
  Synopsys, Inc.
  650-584-8635
  sgulizia@synopsys.com

  Lisa Gillette-Martin
  MCA, Inc.
  650-968-8900 ext. 115
  lgmartin@mcapr.com

SOURCE: Synopsys, Inc.

Web site: http://www.synopsys.com/