Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, and First Silicon Solutions (FS2), a division of MIPS Technologies, Inc. (NASDAQ: MIPS) and a leader in on-chip instrumentation intellectual property (IP) for high-performance debug solutions, today announced the availability of the Sitka evaluation and development platform for Synopsys' DesignWare® PCI Express® (PCIe) IP. The Sitka board, the result of collaboration between the two companies, functions as a standard PCIe add-in card with support for up to eight PCIe lanes (each lane is a 2.5 Gbps communication channel). With this new platform, designers can test and debug their system-on-chip (SoC) designs using the DesignWare PCIe IP while performing interoperability testing between their SoC design and a PCIe PHY. Designers using the Sitka board to prototype SoCs can reduce their design risk, cut development time and enable predictable success in their complex SoCs.

With the Sitka board, designers can prototype large designs by synthesizing their SoC into two large on-board Xilinx Virtex™-4 FPGAs. These two FPGAs are interconnected through 272 I/O pins and can be configured for operating at up to 1 Gbps point-to-point interconnect, providing high throughput data transfers or sets of unidirectional channels. The FPGAs are configured via the on-board ROM. The ROM can hold multiple FPGA configurations allowing the designer to test design variations and switch between different PHYs and the Xilinx Rocket I/O™.

"Partnering with Synopsys, the market leader in PCI Express IP, we are providing designers a high-performance board that can be used to evaluate large, complex PCI Express-based designs," said Rick Leatherman, vice president and general manager of FS2. "Coupling our expertise in hardware verification and debug technology with Synopsys' expertise in PCI Express, we were able to create a solution that allows designers to fully develop, test and debug their SoC designs with PCI Express before committing to silicon."

Synopsys has used the Sitka board for compliance testing of the combined DesignWare PCI Express digital cores and DesignWare PCI Express PHY at the PCI Special Interest Group (PCI-SIG®) Compliance Workshops. For design development and prototyping, the Sitka board provides multiple options for the PHY interface. For initial prototyping, designers can use the built-in Xilinx Rocket I/O SERDES connected directly to the Sitka PCIe interface. For more extensive PCIe and PHY compatibility testing with their designs, designers can use a PCIe PIPE-compliant PHY and connect through the standard PIPE-C- compliant expansion connector. For DesignWare PCIe digital IP evaluations, Synopsys provides an FPGA configuration that allows the Sitka board to be used as a PCI Express-based 10/100 Ethernet adapter.

"Our customers have been asking us for a hardware development environment that provides high-performance hardware and the capacity to handle large designs with our proven DesignWare PCI Express IP," said Guri Stark, vice president of Marketing for the Solutions Group at Synopsys. "By working closely with FS2, we've created a board that is unmatched in the industry today and enables designers to get to market faster while reducing their risks and lowering costs."

  Availability
  The Sitka development and evaluation board is available now through FS2.

  About DesignWare Cores

Synopsys DesignWare Cores provide system designers with silicon-proven, digital, and mixed-signal connectivity IP for some of the world's most recognized products, including communications processors, routers, switches, game consoles, digital cameras, computers and computer peripherals. Provided as synthesizable RTL source code or in GDS format, these cores enable designers to create innovative, cost-effective system-on-chips and embedded systems. Synopsys provides flexible licensing options for the DesignWare Cores. Each core can be licensed individually, on a fee-per-project basis, or users can opt for the Volume Purchase Agreement, which enables them to license all the cores as part of one simple agreement. For more information on DesignWare IP, visit: http://www.designware.com/.

About FS2

First Silicon Solutions specializes in hardware verification and debug technologies including on-chip instrumentation, custom silicon IP, development tools and design services for programming, testing and debug of embedded systems in FPGA, SoC, SOPC, ASSP and ASIC designs. FS2 provides full system solutions with IP blocks for processor, logic and complex system-level designs, along with hardware and software tools for improved debug and analysis at all stages in the development cycle -- from system design and verification to software development and optimization. FS2 products enable silicon vendors and their customers to take their designs from "first silicon" to production faster, with a better understanding of the design performance and overall operation -- for faster time-to-market and higher quality products. FS2 was acquired in September 2005 by, and is a division of, MIPS Technologies, Inc. Additional information about First Silicon Solutions is available at www.fs2.com.

About Synopsys

Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Synopsys and DesignWare are registered trademarks of Synopsys, Inc. PCI Express is a registered trademark of PCI-SIG. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

   Editorial Contacts:

   Yvette Huygen
   Synopsys, Inc.
   650-584-4547
   yvetteh@synopsys.com

   Tara Yingst
   A&R Edelman
   650-762-2942
   tara.yingst@ar-edelman.com

SOURCE: Synopsys, Inc.

CONTACT: Yvette Huygen of Synopsys, Inc., +1-650-584-4547 or
yvetteh@synopsys.com; or Tara Yingst of A&R Edelman, +1-650-762-2942 or
tara.yingst@ar-edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/