Cloud native EDA tools & pre-optimized hardware platforms
Synopsys Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, announced that Galaxy™ Power offers the industry's first comprehensive low-power solution for today's most advanced, high-performance 90-nanometer (nm) designs. ARM, IBM and NVIDIA have selected Synopsys' Galaxy Power to achieve best-in-class low-power optimization in their next-generation designs. Synopsys' Galaxy Power delivers 2X power reduction without impacting the implementation flow, and offers new capabilities for standby mode (state retention) designs and support for multi-threshold designs.
"By using Synopsys' Galaxy Design Platform, we were able to design the GeForce 6800, a complex 222-million transistor graphics processing unit designed for ultimate performance with low power requirements," said Dan Smith, director of engineering, NVIDIA. "With Synopsys' low power solution, we are able to achieve significant dynamic power reduction with greater than 12 percent savings in area. As a result, Galaxy Power is now a standard for power management in our design flow."
"We have collaborated with Synopsys and qualified its Galaxy Power solution for our 90nm ASIC design flow," said Richard Busch, director, ASIC Business Unit, IBM Systems and Technology Group. "Our customers can now optimize chips designed to reduce power using Galaxy Power as an integrated solution within IBM's ASIC methodology flow."
Synopsys Galaxy Power offers a customer-proven solution for low-power optimization and power integrity. For low power, Galaxy Power delivers power grid synthesis and power optimization with support for automatic hierarchical clock-gating, multi-voltage designs, multi-threshold leakage, and state retention power-gating. Vector-free power analysis and sign-off level power integrity -- including voltage-drop and electromigration analysis -- are also part of Galaxy Power. Galaxy Power provides a seamless flow with test (DFT Compiler™ and TetraMAX®), timing (PrimeTime® and PrimeTime SI) and verification (Formality® and VCS®). The full complement of capabilities in Galaxy Power gives designers a predictable, 90-nm-proven design flow that speeds timing, area and power convergence, enabling rapid design closure.
"ARM has partnered with Synopsys on low energy design, and we have jointly developed a test chip with the Synopsys Galaxy Design Platform and the ARM® Intelligent Energy Manager (IEM) technology to demonstrate up to 60 percent core energy reduction in a typical MP3 use case," said Clive Watts, IEM product manager, ARM. "At DAC 2004, ARM and Synopsys are highlighting the ARM926EJ-S™ applications processor-based IEM demonstrator system implemented using Synopsys' Galaxy Design Platform."
"Synopsys is delivering production-proven power solutions that enable market leaders to speed design convergence and reduce overall fabrication cost. Our customers are reporting 60 to 95 percent leakage power reduction with no degradation in chip performance, and significant area savings," said Antun Domic, senior vice president and general manager of Synopsys Implementation Group. "ARM, IBM and NVIDIA have selected Galaxy Power for its unique ability to deliver mission-critical power reduction within the Galaxy Design Platform."
About Synopsys
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .
NOTE: Synopsys, PrimeTime, TetraMAX, Formality and VCS are registered trademarks of Synopsys, Inc., and Galaxy, DFT Compiler are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: media, Nancy Renzullo of Synopsys, Inc., +1-650-584-1669, or
renzullo@synopsys.com; or Sarah Seifert of Edelman Public Relations,
+1-650-429-2776, or sarah.seifert@edelman.com, for Synopsys, Inc.
Web site: http://www.synopsys.com/