Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced the addition of Serial ATA (SATA) verification intellectual property (VIP) to its DesignWare® Library. System-on-chip (SoC) designers now have access to high-quality, high-performance SATA VIP to verify both 1.5Gb/s and 3.0Gb/s generations of the SATA standard with direct and constrained random verification methods at the block and chip level. The addition complements Synopsys' existing DesignWare SATA digital host controller core.

Synopsys' SATA VIP includes device controller and monitor models for verifying designs with a SATA host controller interface. In addition to supporting third-party VHDL, Verilog and SystemVerilog simulators, DesignWare SATA VIP also supports Synopsys' VCS® simulator native testbench (NTB) capability for improved runtime performance, as well as Synopsys' Reference Verification Methodology (RVM) with coverage-driven verification capability for improved productivity.

"Due to time-to-market pressures, designers of high-performance SoCs for storage products require high-quality SATA verification tools," said Joni Clark, SATA-IO marketing chairwoman and Seagate Technology SATA marketing manager. "Synopsys is an active member of SATA-IO with an inside view of the current SATA specifications. Synopsys' deep knowledge of the technology demonstrates the company's dedication to SATA excellence."

"Verification at block and chip level is a key concern for SoC designers using the SATA interface," said Guri Stark, vice president of Marketing, Synopsys' Solutions Group. "DesignWare SATA VIP, with advanced verification capabilities that include Native Testbench, Reference Verification Methodology with coverage-driven verification, gives SoC designers the ability to rigorously verify the SATA interface. We see SATA adoption and SoC integration increasing rapidly and Synopsys is firmly committed to providing a complete SATA solution for this growing community of designers."

Availability

The DesignWare VIP for SATA is currently available to DesignWare Library and DesignWare Verification Library licensees for no additional charge. The DesignWare VIP for SATA is also available for purchase separately. NTB capability is planned to be available by end of Q2 calendar 2005. The DesignWare SATA host controller core with support for both 1.5Gb/s and 3.0Gb/s is also available now.

Serial ATA is the next-generation internal storage interconnect for connecting the host system to peripherals such as hard drives, optical drives and removable magnetic media devices. The standard is overseen by SATA-IO, an independent, non-profit organization developed by and for leading industry companies to provide the industry with guidance and support for implementing the SATA specification. Synopsys is a member of SATA-IO.

About the DesignWare Verification Library

The DesignWare Verification Library provides the broadest portfolio of design-proven, high-quality, standards-based verification IP, helping designers save testbench development time and reach functional coverage goals faster. DesignWare Verification IP offers advanced functionality for block and chip-level verification and is an integral part of the Synopsys Discovery™ Verification Platform. DesignWare Verification IP is fully functional in Vera®, Verilog and VHDL verification environments and works with every major simulator. The DesignWare Verification Library includes: PCI Express™, PCI-X®, PCI®, USB 1.1/2.0/OTG, AMBA™ 2.0, AMBA 3 AXI™, 10/100/1G/10G Ethernet, I2C, SATA, and Serial I/O standards, over 10,000 memory models and more. For more information on DesignWare IP, visit: www.designware.com or call 1-877-4BEST-IP.

About Synopsys

Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http:/www.synopsys.com.

NOTE: Synopsys and DesignWare, VCS and Vera are registered trademarks of Synopsys, Inc. Discovery is a trademark of Synopsys. PCI, PCI-X and PCI Express are registered trademarks or trademarks of PCI-SIG. AMBA and AXI are trademarks of ARM Limited. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

  Editorial Contacts:
   Troy Wood
   Synopsys, Inc.
   650-584-5717
   twood@synopsys.com

   Julie Crabill
   Edelman
   650-429-2732
   julie.crabill@edelman.com

SOURCE: Synopsys, Inc.

CONTACT: Troy Wood of Synopsys, Inc., +1-650-584-5717, or
twood@synopsys.com; or Julie Crabill of Edelman, +1-650-429-2732, or
julie.crabill@edelman.com, for Synopsys

Web site: http://www.synopsys.com/