TSMC and Synopsys Announce CCS Model Support for TSMC'S 65-Nanometer Process
Latest CCS-based Libraries Improve Designer Productivity for Low-Power, High-Performance Designs

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, and Taiwan Semiconductor Manufacturing Company, Ltd. (TSMC; NYSE: TSM), the world's largest semiconductor foundry, today announced the immediate availability of Composite Current Source (CCS) models for use in the TSMC 65-nanometer (nm) and 90-nm process technologies. Used in conjunction with the Synopsys Galaxy™ Design Platform, the high-accuracy CCS timing and noise models allow the designer to reduce guard-band margins during design implementation and sign-off, thus improving quality of results and reducing design iterations. CCS models are proven to deliver signoff-level accuracy to within 2 percent of HSPICE® simulation as seen at leading semiconductor companies.

"The latest advances in silicon technology pose new challenges in modeling nanometer effects," said Kuo Wu, deputy director of Design Service Marketing at TSMC. "We worked closely with Synopsys to characterize and validate the CCS-based standard-cell library models. By meeting the high-performance and low-power requirements of our 65nm process technology, the CCS-based models allow us to provide a significant competitive advantage to our customers."

CCS modeling technology, part of the open-source Liberty™ library modeling standard, enables highly accurate and comprehensive modeling of nanometer effects that encompass timing, signal integrity and power. CCS modeling technology constitutes the foundation for modeling variations. CCS models are designed to be scalable for voltage, temperature and process. They enable voltage variation modeling, simplifying advanced low-power design flows such as multi-Vt and multi-Vdd, as well as dynamic voltage and frequency scaling. There is significant industry-wide momentum behind CCS modeling technology with library availability from leading foundries, intellectual property (IP) vendors and integrated device manufacturers (IDMs).

"Synopsys recognizes the need to deliver complete design implementation and sign-off solutions that reap the benefits of the latest silicon technologies," said Bijan Kiani, vice president of marketing, Synopsys Implementation Group. "CCS modeling support from market- and technology- leading companies like TSMC will ensure that our mutual customers have access to validated IP that delivers higher accuracy and better performance when used with the Galaxy Design Platform."


The TSMC standard-cell libraries enabled with CCS modeling technology for the 65G+ and 65LP as well as the 90G, 90GT and 90LP processes are available immediately through the Synopsys DesignWare® library at no additional cost to current licensees. For more information on the TSMC Nexsys libraries available from Synopsys and to request download authorization please visit: www.synopsys.com/designware/tsmc.html.

About DesignWare Library

The DesignWare Library contains the principal intellectual property ingredients for design and verification including foundry libraries, datapath IP, AMBA™ bus IP and peripherals, verification IP of standard bus I/Os, memories, microcontrollers and design views of popular Star IP. For more information on DesignWare IP, visit: www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

About TSMC

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven libraries, IP, design tools and reference flows. The Company's total managed capacity in 2006 exceeded seven million (8-inch equivalent) wafers, including capacity from two advanced 12-inch GigaFabs, four eight-inch fabs, one six-inch fab, as well as TSMC's wholly owned subsidiaries, WaferTech and TSMC (Shanghai), and its joint venture fab, SSMC. TSMC is the first foundry to provide 65nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please see http://www.tsmc.com/.

Synopsys, HSPICE and DesignWare are registered trademarks of Synopsys, Inc. Galaxy and Liberty are trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

SOURCE: Synopsys, Inc.

CONTACT: Sheryl Gulizia of Synopsys, Inc., +1-650-584-8635, or
sgulizia@synopsys.com; or Laurie Brunner of TSMC North America,
+1-408-328-8089, or lbrunner@tsmc.com; or Rachel Modena Barasch of MCA, Inc.,
+1-650-325-7547, or rbarasch@mcapr.com

Web site: http://www.synopsys.com/