Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, was named by TSMC (NYSE: TSM; TSMC), to distribute its production-ready, silicon-validated 65-nanometer (nm) Nexsys(SM) standard cell libraries, I/Os and memory compilers through Synopsys' DesignWare® IP library.

TSMC developed the libraries in close relationship with their process development teams to ensure conformance to TSMC's design-for-manufacturing rules. TSMC validated the libraries through the TSMC-9000 program to meet their rigorous library quality criteria. TSMC and Synopsys also worked together to validate that the Nexsys libraries provide full support for the TSMC Reference Flow 6.0 within Synopsys Galaxy™ Design and Discovery™ Verification Platform.

"We worked closely with Synopsys to optimize, distribute and support our standard cells, I/Os and memory compilers," said Ed Wan, senior director of Design Service Marketing at TSMC. "It's important for our customers to get early access to fully validated IP for our most advanced processes, which accelerates the adoption of 65-nm designs."

TSMC Nexsys standard cell libraries offer a complete set of high-performance, high-density cells and include multiple voltage thresholds to enable power and speed trade-offs. The Nexsys libraries also enable low power design and mitigating power leakage by supporting Power Gating and Voltage Scaling design implementations. TSMC's I/Os offer unique features such as Circuit-Under-Pad, flip-chip support and staggered or linear bonding within one library. TSMC's memory compilers, available for TSMC's 65-nm low power (LP) process, are optimized for low dynamic and leakage power. They include a single port SRAM with and without redundancy, dual port SRAM, a single-port and two-port Register File, and a ROM compiler.

"This significant expansion to our existing library distribution relationship with TSMC gives DesignWare Library users easy access to -high-quality IP for the most advanced silicon processes," said Guri Stark, vice president of Marketing for the Solutions Group at Synopsys. "The TSMC Nexsys libraries are a key element in our broad portfolio of silicon-proven IP. Working with TSMC illustrates our commitment to provide essential IP to engineering teams worldwide for the development of their leading-edge SoC designs."

Availability

The TSMC Nexsys standard cell libraries and I/Os for the 65LP processes are available immediately through the DesignWare Library at no additional cost to current licensees. TSMC's Nexsys memory compilers for TSMC 65LP and TSMC 90LP are licensed separately and available immediately through Synopsys. TSMC's Nexsys standard cell libraries and I/Os for 90nm, 0.13um and 0.15um process nodes are also available through the DesignWare Library at no additional cost to current licensees. For more information on the TSMC Nexsys libraries available from Synopsys and to request download authorization please visit: www.synopsys.com/designware/tsmc.html.

About DesignWare Library

The DesignWare Library contains the principal intellectual property ingredients for design and verification including foundry libraries, datapath IP, AMBA™ bus IP and peripherals, verification IP of standard bus I/Os, memories, microcontrollers and design views of popular Star IP. For more information on DesignWare IP, visit: www.synopsys.com/designware.

About TSMC

TSMC is the world's largest dedicated semiconductor foundry, providing the industry's leading process technology and the foundry industry's largest portfolio of process-proven library, IP, design tools and reference flows. The company operates two advanced twelve-inch wafer fabs, five eight-inch fabs and one six-inch wafer fab. TSMC also has substantial capacity commitments at its wholly owned subsidiaries, WaferTech and TSMC (Shanghai), and its joint venture fab, SSMC. TSMC is the first foundry to provide 65-nm production capabilities. Its corporate headquarters are in Hsinchu, Taiwan. For more information about TSMC please see http://www.tsmc.com/ .

About Synopsys

Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys and DesignWare are registered trademarks of Synopsys, Inc. Galaxy and Discovery are trademarks of Synopsys. Nexsys is a trademark of TSMC. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

   Editorial Contacts:

   Renae Veiga                        Dan Holden
   Synopsys, Inc.                     TSMC North America
   650-584-1902                       408-382-7921
   renae@synopsys.com                 dholden@tsmc.com

   Khyati Shah
   Edelman Public Relations
   650-429-2769
   khyati.shah@edelman.com

SOURCE: Synopsys, Inc.

CONTACT: Renae Veiga of Synopsys, Inc., +1-650-584-1902, or
renae@synopsys.com; or Khyati Shah of Edelman Public Relations,
+1-650-429-2769, or khyati.shah@edelman.com, for Synopsys, Inc.; or Dan Holden
of TSMC North America, +1-408-382-7921, or dholden@tsmc.com

Web site: http://www.synopsys.com/