Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that Hisilicon Technologies, one of the largest IC design companies in China and former ASIC Design Center of Huawei Technologies, has adopted Synopsys' Galaxy™ Design Platform as its primary IC design flow for 130-nanometer (nm) designs. A major competitive challenge faced by Hisilicon is to reduce the power consumption of its advanced, high-speed designs. Synopsys' Galaxy platform provides Hisilicon with the most comprehensive low-power solution and enhances their low-power design capabilities.

"Low-power design is definitely the critical constraint on today's IC designs for consumer electronic applications, and also a determining factor of every project's success," said Mr. Ai Wei, senior vice president of Hisilicon Technologies Co., Ltd. (formerly Huawei Technologies ASIC Design Center). "Using Synopsys' Galaxy low-power flow throughout the entire design process, from RTL to GDSII, we are able to address the low-power challenge of today's strong market pressure. We're happy to extend our strategic partnership with Synopsys and are confident that it raises our design capability to a higher level."

Hisilicon's design implementation flow is based on Synopsys Galaxy products, including Design Compiler® RTL synthesis solution, JupiterXT™ physical planning solution, Physical Compiler® and Astro™ physical implementation solutions, Power Compiler™ multi-voltage power management solution, Star-RCXT™ parasitic extraction solution, and PrimeTime® SI static timing sign-off solution.

"The adoption of Synopsys' Galaxy platform by Hisilicon is a clear indication that customers value the superior results we can deliver," said Antun Domic, senior vice president and general manager of the Implementation Group at Synopsys. "Excellence in low-power design has become a critical differentiator and we will continue to work with our customers to improve their competitiveness."

About Synopsys

Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys, Design Compiler, Physical Compiler, and PrimeTime are registered trademarks of Synopsys, Inc. Astro, Galaxy, JupiterXT, Power Compiler, and Star-RCXT are trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

  Editorial Contacts:

  Janet Berkman
  Synopsys, Inc.
  650-584-5707
  jberkman@synopsys.com

  Angela Costa
  Edelman
  650-429-2765
  angela.costa@edelman.com

SOURCE: Synopsys, Inc.

CONTACT: Janet Berkman of Synopsys, Inc., +1-650-584-5707, or
jberkman@synopsys.com; or Angela Costa of Edelman, +1-650-429-2765, or
angela.costa@edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/