Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced that the new release of PrimeTime® -- the timing backbone in Synopsys' Galaxy™ Design Platform -- has set a new performance standard for static timing analysis and sign-off of 90-nanometer (nm) designs, enabling timing analysis of 100-million gate designs. Customer benchmarks show an average of three times runtime improvement and up to three times data capacity improvement over the previous release. PrimeTime's significant performance gains are the result of algorithmic improvements in reporting and advanced static timing analysis, combined with a new save-and-restore capability that enables concurrent timing analysis of large, complex designs.

"Fast, accurate static timing analysis that is capable of modeling 90-nanometer effects is essential to our sign-off flow," said Kazuyuki Miyata, group manager, Solution Service Group, EDA Technology Development Department, Design Solution Division, Toshiba Microelectronics Corporation. "Synopsys newest version of PrimeTime delivered huge performance gains, especially when modeling manufacturing process variation effects. These improvements enabled us to verify our latest 11-million gate 90-nanometer design in just three and a half hours, reducing our overall sign-off time by 50 percent."

"We adopted the latest release of PrimeTime to tape out our recent five-million gate system-on-chip design with first-pass silicon success," said Akio Nakajima, design manager, Design Systems Development Group, System-on-a-Chip Design Division, NEC Micro Systems. "The latest PrimeTime release runs three-to-five times faster and uses up to a third less memory than previous releases. With these improvements, we can now verify large designs on a 32-bit Linux machine while reducing our overall timing verification time by half."

PrimeTime (version 2003.12) delivers new capabilities that further improve performance, memory utilization and productivity. A new save-and-restore feature delivers significant productivity improvements, enabling users to restart large timing analysis runs, avoiding lengthy re-computation of data, and enabling concurrent analysis by a design team. In addition, enhancements made to report generation and to on-chip variation (OCV) analysis with clock re-convergence pessimism removal (CRPR) dramatically speed runtime and data capacity, enabling designers to complete static timing analysis of complex 90nm designs in significantly less time.

"As a leading manufacturer of complex SoCs for wireless and digital consumer applications, Renesas Technology must meet very aggressive market windows," said Hisaharu Miwa, department manager, EDA Technology Development Department, Design Technology Division, LSI Product Technology Unit, Renesas Technology Corporation. "Using the new PrimeTime to accurately model process variation effects, we realized four-times runtime and two-times data capacity improvement on our latest 10-million gate SoCs."

"At 90 nanometers and below, advanced static timing analysis features that accurately model silicon behavior are essential," said Antun Domic, senior vice president and general manager, Synopsys Implementation Group. "Used as an integral part of implementation flows, PrimeTime continues to deliver the needed technology innovations and, at the same time, sets a new standard for performance and capacity to help keep up with Moore's law."

About Synopsys

Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading IC design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/ .

NOTE: Synopsys and PrimeTime are registered trademarks of Synopsys, Inc. Galaxy is a trademark of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

SOURCE: Synopsys, Inc.

CONTACT: Nancy Renzullo of Synopsys, Inc., +1-650-584-1669, or
renzullo@synopsys.com; or Sarah Seifert of Edelman Public Relations,
+1-650-429-2776, or Sarah.seifert@edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/