Cloud native EDA tools & pre-optimized hardware platforms
Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced that its DesignWare® Universal Serial Bus (USB) 2.0 Multiport Host and Physical Layer (PHY) are the first host Intellectual Property (IP) Building Blocks to achieve Hi-Speed certification from the USB Implementers Forum (USB-IF). The USB IP has also passed the Microsoft Windows Hardware Qualification Lab Hardware Compatibility Tests (WHQL HCT) on Windows XP and 2000 for compatibility with standard drivers. The certified combination of PHY and digital IP from Synopsys can help designers eliminate integration problems while reducing risk and increasing design productivity.
The Hi-Speed logo tells designers that the IP they are deploying is interoperable and compliant to the specification, which enables throughput of up to 480 Mbps, 40 times faster than the original USB specification (12 Mbps). Certification is critical if USB products are to successfully interoperate with other USB devices. The WHQL certification indicates plug and play interoperability and compatibility with Windows XP and 2000 operating systems.
"Synopsys continues to demonstrate leadership in Hi-Speed USB 2.0 designs by testing and passing Hi-Speed certification for its IP Building Blocks," said Jeff Ravencraft USB-IF Chair. "This certification shows how making good use of the USB-IF Compliance Program can give companies greater confidence in building high quality USB 2.0 products. More certified Hi-Speed USB 2.0 building blocks, like those from Synopsys, help fuel the ever growing USB market."
Synopsys DesignWare USB 2.0 Host, Device, and PHY IP, which have already been used in more than 100 designs, allow designers to integrate a Hi-Speed USB 2.0 host or device into ASICs for PCs, PDAs, DVRs, set-top boxes and consumer electronics. The DesignWare USB 2.0 PHY implements the high-speed physical layer of USB 2.0. The 0.18-micron PHY has been Hi-Speed USB 2.0 Certified with both the DesignWare USB 2.0 Host and Device. By using the certified combination of PHY and digital IP from Synopsys, designers can eliminate the problem of integrating analog and digital Hi-Speed USB 2.0 IP.
"SoC designers look to Synopsys for industry-certified IP to help reduce risk and increase design productivity," said Guri Stark, vice president, marketing, Synopsys Solutions Group. "Our DesignWare USB 2.0 Host and PHY are the first, and currently only, IP products to receive Hi-Speed certification from the USB-IF and the Windows Hardware Qualification Labs certification testing for USB 2.0. Combined with our own set of interoperability and EHCI tests, this gives designers the benefits of a strong foundation in interoperability and compatibility, enabling them to concentrate on the value- added features in their designs."
The DesignWare USB 2.0 Host, Device and PHY cores, as well as DesignWare USB 2.0 Verification IP, are available today. The host and device are synthesizable to any process technology. The PHY is available as a hard core today in TSMC 0.18 and 0.13 micron processes. Other processes are available on request.
About DesignWare IP
DesignWare, the world's most widely used, silicon-proven IP, provides designers with a comprehensive portfolio of synthesizable implementation IP, hardened PHYs and verification IP for ASIC, SoC and FPGA designs. The DesignWare IP family includes industry leading connectivity IP cores and verification IP (e.g., USB 1.1, USB 2.0, USB 2.0 PHY, USB 2.0 On-the-Go, PCI, PCI-X, PCI Express, Ethernet, I2C), AMBA™ on-chip bus (logic, peripherals, verification IP) complete memory solution (e.g., memory controllers, BIST and models), high speed datapath components, microcontrollers (8051, 6811) and Star IP processors (e.g., IBM PowerPC® 440, Infineon C166™S and TriCore™1, MIPS32™ 4KE™, NEC V850E™).
For a complete directory of Synopsys' available IP visit: www.synopsys.com/ipdirectory
For more information on DesignWare IP, visit: http://www.designware.com/ or call 1-877-4BEST-IP.
About Synopsys
Synopsys, Inc. is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at www.synopsys.com.
NOTE: Synopsys and DesignWare are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
SOURCE: Synopsys, Inc.
CONTACT: Troy Wood of Synopsys, Inc., +1-650-584-5717, or
twood@synopsys.com; or Pushpita Prasad of Edelman, +1-650-429-2723, or
pushpita.prasad@edelman.com, for Synopsys, Inc.
Web site: http://www.designware.com/
Web site: http://www.synopsys.com/