Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that San Jose State University is the recipient of a Charles Babbage Grant sponsored by both Synopsys and Intel Corporation. San Jose State University's College of Engineering will receive licenses of Synopsys' comprehensive electronic design automation (EDA) software, along with curriculum support and professor training, as well as 32 individual Intel® Pentium® 4 processor-based systems to outfit a new Process and Integrated Circuit Design Laboratory. The new lab will be used for advanced research and graduate and undergraduate teaching programs in Microelectronic Design and Computer Engineering.
Synopsys software in use at San Jose State today provides students and researchers the opportunity to utilize industrial tools for ASIC synthesis, circuit simulation, nanometer device modeling, and fabrication process modeling in both academics and research. Synopsys software serves as the foundation for an industry-standard design flow where students get real world, hands-on experience building and testing their designs.
"We appreciate the generous support provided by Synopsys and Intel that allows us to provide relevant, state-of-the art training and education facilities for our students here in the College of Engineering," said Belle Wei, Dean, College of Engineering, San Jose State University. "Cooperative relationships with technology companies such as Synopsys and Intel ensure that our students will meet the continually evolving needs of employers in Silicon Valley and beyond."
Access to commercial-grade design tools for advanced research and microelectronic design is a common issue facing universities today. Synopsys helps solve this challenge through programs like the Charles Babbage Grant which provides select universities with design software for modern electronic design flows and leading commercial IC fabrication processes.
"Synopsys selected San Jose State University to receive this grant because of their outstanding engineering programs and focus on innovative applications of microelectronic design technologies," said Chi-Foon Chan, president and COO at Synopsys. "Through this grant, Synopsys enables San Jose State University, a premier supplier of Silicon Valley engineering talent, to further their mission in preparing students and researchers to meet the challenges of today's leading-edge design and build careers in the microelectronic industry."
About the Charles Babbage Grant
The Charles Babbage Grant provides select universities worldwide with state-of-the-art EDA tools, training, support and technology. It enables institutions of higher education to enhance their expertise in microelectronics circuits and system design. Use of the Synopsys tools and modern, powerful computers from the grant helps universities to better prepare their graduates for the future by providing hands-on experience with current industry practices, modern design techniques, and actual design tools and hardware, enhancing their understanding of how learning applies to the real world of SoC design. The grant is named after British mathematician and inventor Charles Babbage, who designed and built mechanical computing machines on principles that anticipated the modern electronic computers of today over 150 years ago.
About Synopsys
Synopsys, Inc. is a world leader in EDA software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http:/www.synopsys.com .
NOTE: Synopsys is registered trademark of Synopsys, Inc. Intel and Pentium are registered trademarks of Intel Corporation. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Editorial Contacts: Yvette Huygen Synopsys, Inc. 650-584-4547 yvetteh@synopsys.com
SOURCE: Synopsys, Inc.
CONTACT: Yvette Huygen of Synopsys, Inc., +1-650-584-4547, or
yvetteh@synopsys.com
Web site: http://www.synopsys.com/
