Synopsys Announces Galaxy and Discovery Platform Support for 90 Nanometer IBM-Chartered Process
Complete RTL to Production-Ready GDSII Capability for IBM-Chartered Cross- Foundry Design Enablement Program

Synopsys, Inc. (NASDAQ: SNPS), the world leader in semiconductor design software, today announced validation of the Galaxy™ Design and Discovery™ Verification platforms with the 90 nanometer (nm) process platform common to both IBM and Chartered Semiconductor Manufacturing. Using Artisan Components' 90nm SAGE- X™ standard cell libraries, Synopsys has verified the complete design process from RTL through GDSII verification, demonstrating the ability of the Galaxy and Discovery platforms to address the full range of 90nm design challenges. Synopsys Professional Services performed the validation of the Galaxy and Discovery platform tools with the Artisan libraries as part of the IBM-Chartered cross-foundry design enablement program.

The Galaxy Design Platform allows semiconductor designers to implement complex high-performance 90nm designs into a single GDSII representation that could be manufactured at either IBM or Chartered. The combination of robust design and verification platforms, multiple libraries, and multiple-source manufacturing provides circuit designers a unique combination of design capability, flexibility, and worldwide support.

"Building on the 130 nanometer reference flows we developed, Synopsys has worked with IBM, Chartered and Artisan to create a new flow addressing the challenges of 90 nanometer design. The fact that Synopsys Professional Services could exercise the entire flow using a standard cell block in only two days is testament to the effectiveness of the Galaxy and Discovery platforms and the maturity of the Synopsys flow," said Glenn Dukes, vice president of Synopsys Professional Services. "The ability to quickly transform RTL into a fully validated GDSII is key, but coupling this with the ability to take this GDSII to multiple foundries creates significant new strategic options for designers."

The Synopsys solution spans implementation, verification and IP, providing a complete integrated approach to the design of complex high performance 90nm digital devices. The Galaxy Design Platform tightly links Design Compiler® logic synthesis, JupiterXT™ design planning, Physical Compiler® physical implementation, Astro™ signal integrity and design-for-manufacturing (DFM) aware detailed placement and routing, and PrimeTime® sign-off timing analysis through the Milkyway™ database, increasing accuracy and consistency throughout the design process and reducing the number of design iterations. The Artisan libraries provide three voltage threshold (Vt) levels, allowing Power Compiler™ to simultaneously optimize performance, area, switching and leakage power with the optimal mix of cells and Vt levels. The 1-pass test synthesis and comprehensive DFT rule checks are supported through DFT Compiler™, while manufacturing test pattern generation supporting both stuck-at and delay faults and failure diagnosis is supported by TetraMAX®. Final design sign-off is supported by PrimeTime SI, Star- RCXT™, and Hercules™ using technology files available from IBM or Chartered. The Discovery Verification Platform provides multi-language functional verification through VCS® and Formality® for equivalence checking. HSPICE® is also supported using models available from IBM or Chartered. A broad range of DesignWare® implementation and verification IP is also supported for further productivity gains.

"IBM and Synopsys have a well-established history of working together to deliver design capabilities for IBM's advanced technologies," said Tom Reeves, vice president, semiconductor products and solutions, IBM Systems & Technology Group. "Synopsys is providing a comprehensive and consistent implementation solution addressing 90 nanometer issues that will enable designers to maximize the inherent advantages of the IBM-Chartered common process platform."

"Addressing the complex issues of 90 nanometer design requires complete, leading-edge solutions from functional verification through physical implementation and physical verification," said Kevin Meyer, vice president of worldwide marketing and services at Chartered. "Synopsys' Galaxy and Discovery platforms provide these leading-edge capabilities in a comprehensive fashion, thereby reducing the time to high volume manufacturable silicon. This common reference flow allows designers to take full advantage of the design portability and flexible sourcing that Chartered and IBM have established through our common process platform."

About Synopsys

Synopsys, Inc. (NASDAQ: SNPS) is the world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at

NOTE: Synopsys, DesignWare, Formality, HSPICE, Design Compiler, Physical Compiler, PrimeTime, TetraMAX and VCS are registered trademarks of Synopsys, Inc., and, Astro, DFT Compiler, Discovery, Galaxy, Hercules, JupiterXT, Milkyway, Power Compiler and Star-RCXT are trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

SOURCE: Synopsys, Inc.

CONTACT: Robert Smith of Synopsys, Inc., +1-650-584-1261, or; or Sarah Seifert of Edelman, +1-650-429-2776, or, for Synopsys, Inc.

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