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Sep 22, 2016

TSMC and Synopsys Collaboration Delivers Innovative Technologies for the High Performance Compute (HPC) Platform

Scope of Collaboration Includes Innovations in Place-and-Route Optimization Technologies for High-Performance Designs

Highlights: Innovations include multiple new implementation technologies including via pillar and clock tree optimizations in IC Compiler II Both companies initiate Design Compiler Graphical...
Sep 21, 2016

Synopsys Foundation IP Meets Stringent Automotive AEC-Q100 Grade 1 Temperature Requirements for TSMC 16FFC and 28HPC+ Processes

DesignWare Logic Libraries and Embedded Memories Accelerate Development and Qualification of Automotive SoCs

Highlights: DesignWare Foundation IP meets automotive Grade 1 temperature (-40C to +150C junction) requirements, delivering high reliability for automotive SoCs ASIL D Ready Embedded Memories,...
Sep 21, 2016

Synopsys and TSMC Collaborate to Certify Custom Compiler for 16FFC Process

TSMC Certified Synopsys Custom, Digital and Signoff Tools for 16FFC Process

Highlights: Collaboration includes enhanced reliability simulation support, and electromigration-aware enablement for automotive applications TSMC 16FFC certification includes custom, digital and...
Sep 20, 2016

Synopsys Delivers Complete DesignWare Bluetooth Low Energy IP Solution with Link Layer and PHY on TSMC 40ULP Process for IoT SoCs

Compact Link Layer and PHY Supporting Bluetooth 5 Enable Efficient Wireless Connectivity with Secure Connections and Extended Reach

Highlights: DesignWare Bluetooth Link Layer integrates data encryption and random number generation for authenticated secure wireless connections PHY IP on TSMC 40ULP process supports Bluetooth 5...
Sep 19, 2016

Synopsys Accelerates Development of Safety-Critical Products with Design Solutions for ARM Cortex-R52

Synopsys Tools Enable Design and Safety Certification of Automotive, Industrial and Health Care SoCs Based on New ARMv8-R Architecture CPU

Highlights: Galaxy Design Platform tools, including IC Compiler II place and route, Design Compiler Graphical synthesis, and ISO 26262-certified TetraMAX II ATPG enable optimal power, performance...

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