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  • Jul 8, 2014
    New Trim NVM IP Leverages Faster Programming Times to Reduce NVM Test Time by 3X Without Compromising AEC-Q100 Quality

    Highlights: Synopsys DesignWare® AEON® Trim Non-Volatile Memory (NVM) IP for high-voltage processes offers 75 percent smaller IP area compared to existing reprogrammable NVM IP solutions,...

  • Jul 8, 2014
    Protocol test suites in SystemVerilog source code accelerate compliance testing of Ethernet, USB, PCI Express, ARM AMBA AXI and MIPI CSI-2 protocols

    Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of key protocol...

  • Jun 30, 2014
    Collaboration enables stochastic modeling of device degradation and reliability through industry leading Sentaurus Device TCAD simulator

    Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, and the Indian Institute of Technology, Bombay,...

  • Jun 24, 2014
    Production-Ready DesignWare IP for TSMC 28HPC Process Enables Designers to Reduce Power Consumption and Area for Mobile and Ultra Low-Power IoT Designs

    Highlights: Synopsys DesignWare® IP portfolio for TSMC 28HPC includes interface, analog, embedded memory and logic library IP Production-ready IP portfolio enables fast time-to-market by...

  • Jun 23, 2014
    New Program Provides Prototypers with Daughter Boards and Services from Synopsys-Approved Third Party Providers

    Highlights: HAPS Connect Program enables prototypers to leverage proven solutions from hardware and service vendors for fast prototype bring-up Network of approved third party hardware and service...