All News Releases

Highlights: Fuji Xerox reduced silicon area by more than 50 percent using an application-specific instruction set processor (ASIP) developed with ASIP Designer, compared to fixed hardware ASIP...

Highlights: DesignWare Cryptography IP solutions are compliant with SHA-3, the latest standard released by the National Institute of Standards and Technology IP solutions target a range of...

Highlights: TSMC selects Synopsys as its "Partner of the Year" for interface IP and tool enablement for the 5th consecutive year Synopsys' Digital and Custom Implementation tools and reference...

Highlights: Broad IP portfolio for IoT designs includes logic libraries, memory compilers, non-volatile memory, data converters, wired and wireless interface IP, security IP, processor cores and a...

Highlights: Synopsys' successful tape-out of IP for TSMC 10-nm process includes USB 3.1, USB 3.0, USB 2.0, HSIC, PCI Express 3.0, PCI Express 2.0 and MIPI D-PHY Tape-out of DesignWare IP enables...

Highlights: IC Compiler II certified for TSMC's 10-nm FinFET V0.9 process Certification includes a new reference flow for the full suite of digital, signoff and custom implementation tools from...

Synopsys, Inc. (Nasdaq:SNPS) today announced that TSMC has certified its IC Compiler™ II place and route product for V0.9 of 10-nanometer (nm) FinFET process technology (N10FF), and are on track...

Highlights: HAPS-80 FPGA-based prototyping system with ProtoCompiler software delivers up to 100 MHz multi-FPGA performance and new automated high-speed pin-multiplexing ProtoCompiler software,...

Synopsys, Inc. (Nasdaq: SNPS), today announced it will host a webcast for investors on Thursday, Sept. 17, 2015. Aart de Geus, Synopsys chairman and co-CEO, Andreas Kuehlmann, senior vice...

Highlights: Latest cores extend the ARC EM DSP Processor Family, combining high efficiency control and signal processing for ultra-low power, always-on applications New XY memory support in EM9D...