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Oct 8, 2014

HiSilicon Chooses Synopsys' PrimeTime ADV for Faster Timing Closure

Achieves Single-pass Timing and Power ECO Closure on Multiple Tapeouts Including FinFET

Highlights HiSilicon has chosen PrimeTime ADV for timing closure in advanced IC design flow Accurate single-pass timing and power closure with outstanding quality of results (QoR)accelerate time...
Oct 7, 2014

Synopsys Releases Verification IP for Mobile PCIe Technology

Native SystemVerilog-based VIP for PCI Express architecture now supports M-PCIe technology, with built-in coverage, verification plan and protocol-aware debug

Synopsys, Inc. (NASDAQ: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the availability of verification...
Oct 1, 2014

Synopsys' Galaxy Design Platform Delivers Over 30% Leakage Power Reduction for Fujitsu Semiconductor's ARM-Powered Multi-Core

Power Savings Enabled by Unique Techniques and Design Flow Supported by Design Compiler Graphical, IC Compiler and PrimeTime Tools

Highlights: MB86S70 processor designed with ARM® Mali™-T624 GPUs, ARM Cortex®-A15 and Cortex-A7 processors utilizing ARM big.LITTLE™ processor configuration exceeds power-performance targets...
Sep 30, 2014

Synopsys Announces New Additions to Liberty to Significantly Speed up Timing Closure

Single, unified Liberty variation format standardized by the IEEE Industry Standards Board

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems, today announced the completion of an initiative to...
Sep 30, 2014

TSMC and Synopsys Accelerate Custom Design Productivity for 16FF+ Process

Collaboration Enables Best Practices for Custom Implementation Productivity with FinFET Devices

Highlights: Synopsys custom design solution enhanced to meet emerging requirements for 16FF+ process Schematic and simulation environment enhanced to simplify parasitic-aware circuit simulation...

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