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Dec 10, 2013

Synopsys Demonstrates Industry's First SuperSpeed USB 10 Gbps Platform-to-Platform Host-Device IP Data Transfer

Ellisys Protocol Analyzer Confirms Performance of 10 Gbps USB 3.1 Effective Data Rates, More Than Doubling SuperSpeed USB Throughput for Consumer Applications

Highlights: Demonstrated 10 Gbps USB 3.1 Host-Device data transfers at over 900 MBps enables increased performance for storage devices and PCs...
Dec 9, 2013

Synopsys Replenishes Stock Repurchase Authorization to $500 Million

Synopsys, Inc. (Nasdaq:SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic systems,...
Dec 9, 2013

Abilis Systems Achieves First-Pass Silicon Success with DesignWare ARC Processors, Interface IP and Synopsys Professional Services

Silicon-Proven DesignWare IP, Lynx Design System and Consulting Services Reduce Integration Risk and Reduce Time-to-Market by Three Months

Highlights: Achieved first-pass silicon success for its secure media processor using Synopsys' DesignWare ARC Processors, Interface IP, Embedded...
Dec 4, 2013

Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2013

Q4 2013 Financial Highlights

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Nov 26, 2013

Hyperstone Selects Synopsys VCS for Verification of Leading Safety-Critical Industrial Memory Card Controller SoCs

Industry-Leading VCS the Only Verification Technology Capable of Meeting Highest Reliability and Capacity Verification Requirements

Hyperstone, a fabless semiconductor and microprocessor design company, and Synopsys, Inc. (Nasdaq:SNPS), a global leader...
Nov 20, 2013

Synopsys New Ultra Low-Power Non-Volatile Memory IP Cuts Power by 90 Percent and Size in Half

DesignWare Multiple-Time Programmable NVM IP Reduces System Costs for Wireless and RFID / NFC Tag Applications

Highlights: Synopsys DesignWare AEON Multiple-Time Programmable Ultra Low-Power Non-Volatile Memory IP optimized for power- and area-sensitive...
Nov 13, 2013

Synopsys Announces Earnings Release Date for Fourth Quarter and Fiscal Year 2013

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Nov 12, 2013

Synopsys and CEVA Deliver Superior Performance, Power and Area for CEVA DSP Cores with DesignWare HPC Design Kit

HPC Design Kit of Optimized Embedded Memories and Logic Libraries Yields 8 Percent Performance Improvement and 13 Percent Leakage Power Reduction with Smaller Area for CEVA-XC DSPs

Highlights: CEVA and Synopsys collaborated to develop highly optimized DSP core implementations for wireless communications applications...
Nov 6, 2013

Synopsys Surpasses 3000th USB IP Design Win and 1000th PCI Express IP Design Win

Use of Silicon-Proven DesignWare IP by More than 600 Companies Demonstrates High Quality and Low Integration Risk

Highlights: With 3,000 USB and 1,000 PCI Express IP design wins, Synopsys is the low-risk choice for designers implementing these standards...
Nov 6, 2013

Design & Reuse to Host TLMCentral Web Portal

Synopsys' Transfer of TLMCentral to Design & Reuse IP Portal Enables Easy Search of More Than 1000 IP Models to Speed SoC Software Development

Highlights: Integration of the TLMCentral model catalog into the Design & Reuse web portal gives designers a centralized, online resource for...
Nov 5, 2013

Synopsys Announces DesignWare ARC HS Processors for Next-Generation Embedded Data and Signal Processing Systems

New Performance-Efficient Design Optimized for Maximum DMIPS/mm2 and DMIPS/milliwatt

Highlights: DesignWare ARC HS34 and HS36 cores are the first members in a new family of high-speed, low-power processors based on the extensible...
Oct 30, 2013

Synopsys Extends Performance Exploration Solution for ARM AMBA 4 Interconnect-based Multicore SoCs

Platform Architect with New SystemC Model for ARM CoreLink NIC-400 Network Interconnect Enables Optimization of SoC Performance from among Thousands of Configurations

Highlights: Exploration of ARM CoreLink NIC-400 performance parameters with instrumentation for simulation and analysis easily identifies...
Oct 28, 2013

Synopsys Announces Availability of Discovery Verification IP for ARM AMBA 5 CHI Standard

Discovery VIP Successfully Leveraged by Early Licensees Now Broadly Available

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Oct 23, 2013

Synopsys Honors Freescale Semiconductor with 2013 Tenzing Norgay Interoperability Achievement Award

Recognizing leadership and contribution to standards-based collaboration across industry

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Oct 22, 2013

Synopsys Extends DesignWare IP Portfolio for Data Center SoCs with Enterprise 40G Ethernet Controller IP

DesignWare IP Optimized to Address Throughput and Quality-of-Service Requirements in Modern Data Center SoCs

Highlights: Synopsys DesignWare® Enterprise 40G Ethernet MAC and PCS Controller IP optimized for high performance and energy efficiency to...
Oct 15, 2013

Synopsys Introduces DesignWare ARC EM SEP Processor for Safety-Compliant Automotive Systems

Integrated Safety Features and ASIL D Ready Compiler Ease Development of ISO 26262-Compliant SoC Designs

Highlights: Optimized for high-efficiency, low-power embedded automotive applications Automotive Safety Integrity Level D (ASIL D)-ready...
Oct 14, 2013

Synopsys and TSMC Collaborate to Deliver 16-nm Custom Design Reference Flow

TSMC Includes Analog/Mixed-Signal Products for 16-nm Design Requirements

Highlights: HSPICE, Laker, and IC Validator enhanced to support voltage-dependent design rules (VDRC) from simulation through signoff...
Oct 14, 2013

TSMC Awards Synopsys "Partner of the Year 2013" for Joint Development of 16-nm FinFET Design Infrastructure

Synopsys Recognized for Valuable Contributions Towards Development of FinFET Technology

Synopsys, Inc. (Nasdaq: SNPS), a global leader providing software, IP and services used to accelerate innovation in chips and electronic...
Oct 1, 2013

Synopsys Selected as TSMC's 2013 "Interface IP Partner of the Year" for Fourth Consecutive Year

Award Recognizes Technical Leadership, Number of Customer Tape-Outs, and Outstanding Customer Support

Highlights: Selection based on customer feedback, TSMC9000 compliance, number of customer tape-outs and technical support excellence Synopsys'...
Oct 1, 2013

Latest Synopsys Virtualizer Release Accelerates Creation and Deployment of VDKs for Software Development

New TLM Subsystem Flow and Eclipse IDE Integration Speed VDK Availability for Software Developers

Highlights: New transaction-level model subsystem encapsulation enables better collaboration across teams, companies and geographies modeling...
Sep 23, 2013

Synopsys Implementation Solution Included in TSMC 16-nm Reference Flow for FinFET Design

Highlights: Multi-year collaboration delivers proven 16-nm design flow and methodology Synopsys tools are under V0.5 certification and moving...
Sep 19, 2013

Synopsys Announces Immediate Availability of Broad Portfolio of Interface IP for TSMC's 20SoC Process

Silicon-proven Synopsys IP Portfolio on TSMC's 20SoC Process Technology Enables Designers to Reduce Power Consumption and Increase Performance for Mobile and Multimedia SoC Designs

Highlights: Synopsys's DesignWare® IP portfolio for TSMC 20SoC includes USB, DDR, PCI Express®, and MIPI® PHY IP Silicon-proven IP...
Sep 12, 2013

Latest Release of Synopsys' CODE V Enables Faster, More Robust Optical Design Optimization

CODE V version 10.6 is now generally available

Highlights: Unique optimization algorithm speeds design of optical systems with superior image quality Customizable charts provide enhanced...
Sep 11, 2013

Synopsys Demonstrates Industry's First SuperSpeed USB Inter-chip (SSIC) Interoperability

Successful SSIC Interoperability Reduces Integration Risk and Speeds Time-to-Market for Mobile and Wireless Designs

Highlights: Synopsys demonstrates industry's first SSIC interoperability at Intel Developer Forum 2013, September 10-12 in San Francisco,...
Sep 9, 2013

Synopsys Announces DesignWare STAR Hierarchical System to Accelerate Silicon Testing of SoCs

Significantly Reduces Test Integration Time and Improves Test QoR for Hierarchical SoCs

Highlights: Increase design and design-for-test (DFT) productivity with automatic test integration and validation of system-on-chip (SoC),...

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