Cloud native EDA tools & pre-optimized hardware platforms
MOUNTAIN VIEW, Calif., Nov. 11, 2019 /PRNewswire/ --
Highlights
Synopsys, Inc. (Nasdaq: SNPS) today announced that it has signed a definitive agreement to acquire certain IP assets from eSilicon. This acquisition will expand Synopsys' DesignWare® Embedded Memory IP portfolio with TCAMs and multi-port memory compilers, as well as its Interface IP portfolio with High-Bandwidth Interface (HBI) IP. The acquisition will also add a team of experienced R&D engineers to further scale Synopsys' IP development in the most advanced process technologies to address customers' evolving design requirements in growing markets such as AI and cloud. The remaining entirety of eSilicon, including its ASIC business and 56/112G SerDes design and related IP, will be acquired by Inphi Corporation.
The transaction, which is expected to close during Synopsys' first quarter of fiscal 2020, is not material to Synopsys' financials and is subject to Vietnamese regulatory approval and customary closing conditions. Terms are not being disclosed.
"Today's complex SoCs require a broad range of IP to address stringent performance, power and area requirements of advanced applications such as AI and cloud computing," said Joachim Kunkel, general manager of the Solutions Group at Synopsys. "The acquisition of eSilicon's IP will expand our portfolio and enable us to meet our customers' need for high-quality IP across advanced FinFET process technologies from a single trusted supplier with common licensing terms and support infrastructure."
About DesignWare IP
Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare® IP, visit www.synopsys.com/designware.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com/.
Forward-Looking Statements
This press release contains forward-looking statements within the meaning of Section 21E of the Securities Exchange Act of 1934, including statements regarding the pending acquisition of certain assets from eSilicon, the parties' ability to close and the expected closing date of the transaction, and the expected benefits of the transaction. Forward-looking statements are subject to both known and unknown risks and uncertainties that may cause actual results to differ materially from those expressed or implied therein. Such risks and uncertainties include, among others: the ability of the parties to consummate the acquisition in a timely manner or at all; the satisfaction of the conditions precedent to consummation of the acquisition, including the ability to secure regulatory approvals in a timely manner or at all; the effect of the announcement of the pending acquisition on Synopsys' and eSilicon's respective businesses, including possible delays in customer orders; Synopsys' ability to operate or integrate eSilicon's IP assets and R&D engineering team with its own successfully, which may include a potential loss of customers, key employees, partners or vendors; and uncertain customer demand and support obligations for integrated product and service offerings. Other risks and uncertainties that may apply are set forth in the Risk Factors section of Synopsys' most recently filed Quarterly Report on Form 10-Q. Synopsys assumes no obligation to update any forward-looking statement contained in this press release.
Editorial Contact:
Norma Sengstock
Synopsys, Inc.
650-584-4084
norma@synopsys.com
Investor Contact:
Lisa Ewbank
Synopsys, Inc.
650-584-1901
synopsys-ir@synopsys.com
SOURCE Synopsys, Inc.