Synopsys Accelerates Verification Closure of Multimedia SoCs with Next-Generation Verification IP for HDMI 2.0a and HDCP 2.2
Native SystemVerilog HDMI VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug
MOUNTAIN VIEW, Calif., Feb. 24, 2016 /PRNewswire/ -- Synopsys, Inc. (Nasdaq:SNPS), today announced the availability of Verification IP (VIP) for the HDMI version 2.0a standard, supporting High Dynamic Range (HDR) static metadata extensions and built-in support for High-Bandwidth Digital Content Protection (HDCP) version 2.2. Synopsys VC VIP for HDMI enables system-on-chip (SoC) teams to design next-generation multimedia chips with ease of use, fast integration and optimum performance, resulting in accelerated verification closure.
"Consumer electronics companies and content providers are rapidly deploying features enabled by the latest HDMI 2.0a specification, such as HDR video formats and high-bandwidth 4K/UltraHD picture quality," said Rob Tobias, president of HDMI Licensing, LLC. "It's important that our adopters are working to ensure the full 4K/UltraHD experience is delivered to consumers."
Synopsys VIP for HDMI supports callbacks for creating real-time audio/video streaming examples, and custom video timing formats for faster simulation times. It also includes built-in HDCP 2.2 content protection, a security requirement for protecting transfer of UHD 4K content and creating a secured connection between source and display. Synopsys VIP is natively integrated with the Verdi® Protocol Analyzer debug solution and features advanced debug ports for data island, audio and video timing, authentication and encryption for easy and fast debug. Built-in coverage and verification plans are also included to speed up verification coverage closure.
"We continue to collaborate extensively with many leading-edge SoC design teams as new protocols are developed, delivering increased performance and features," said Vikas Gautam, group director of VIP R&D and corporate applications for the Synopsys Verification Group. "With the introduction of Synopsys HDMI 2.0a and HDCP 2.2 VIP, we provide our customers with advanced capabilities to accelerate the verification closure of their multimedia SoC designs."
Availability & Resources
HDMI 2.0a VIP is available today as a standalone product and as part of the Synopsys VIP Library and Synopsys Verification Compiler™ product. The DesignWare® HDMI 2.0 Controllers, PHYs and HDCP 2.2 Content Protection IP are also available now.
For more information on the HDCP 2.2 authentication process, please reference Synopsys' white paper: Demystifying the HDCP2.2 Authentication Process.
About Synopsys Verification IP
Synopsys VC VIP, based on its next-generation architecture and implemented in native SystemVerilog and UVM, offers native performance, native debug with Verdi® Protocol Analyzer, ease of use, complete configurability and comprehensive coverage. These capabilities substantially increase user productivity for one of the most difficult and time-consuming aspects of SoC design and verification. The Synopsys VC VIP library includes a broad portfolio of interface, bus and memory protocols. More information is available at www.synopsys.com/vip.
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
SOURCE Synopsys, Inc.