MOUNTAIN VIEW, Calif., Nov. 24, 2015 /PRNewswire/ --
Highlights:
Synopsys, Inc. (Nasdaq: SNPS) today announced that its IC Compiler™ II place and route solution has been qualified for use on Samsung Foundry's latest 10-nanometer (nm) process. Launched last year, IC Compiler II is the game-changing successor to IC Compiler, the industry's leading place-and-route solution for advanced design. IC Compiler II was designed and built from the ground up to deliver game-changing improvements in throughput and designer productivity. IC Compiler II is already in broad use on Samsung Foundry's 14-nm production FinFET process by a number of mutual customers resulting in numerous completed tape-outs at this node. Driven by this success at 14-nm and increasing customer demand, Samsung Foundry accelerated enablement of IC Compiler II for their latest 10-nm process and expedited its qualification. Based on this rigorous qualification program, Samsung and mutual customers can now realize the many transformational benefits of IC Compiler II on the latest 10-nm FinFET process. Already qualified and in broad use across numerous Samsung Foundry processes, IC Validator's run set availability for this latest 10-nm node enables the In-Design flow with IC Compiler II, which shortens time-to-tapeout and significantly reduces the timing impact of metal fill.
IC Compiler II is a production-ready place-and-route system built from the ground up to deliver an order-of-magnitude improvement in designer productivity. The foundation includes data-model, library and infrastructure advances that maximize multi-core and multi-machine scalability. Through patented advanced-abstraction and compact data-encapsulation, this scalability delivers the capacity for beyond five hundred-million placeable instance design planning tasks while concurrently delivering more than 5X physical implementation throughput. With quality of results (QoR) a key focus for IC Compiler II, variation-tolerant clock-building techniques and the industry's first analytical-physical-synthesis engine deliver proven timing, area and power QoR benefits. Key for 10-nm designs, support for lithography-aware placement constraints, fully color-aware routing as well as timing and extraction modeling are natively captured throughout the infrastructure, enabling all critical IC Compiler II implementation engines to deliver a highly convergent physical-design solution.
"As the cost and resources required to bring new processes to market increases, it is imperative that we in EDA continue to innovate to accelerate that process," said Bijan Kiani, vice president of product marketing for the Design Group at Synopsys. "IC Compiler II and the power of 10X is a key part of our innovation strategy, and we are seeing that both our foundry partners and mutual customers are benefiting from this effort to bring new nodes and leading-edge designs to market faster."
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 16th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software quality and security solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest quality and security, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.
Editorial Contacts:
Sheryl Gulizia
Synopsys, Inc.
650-584-8635
sgulizia@synopsys.com
SOURCE Synopsys, Inc.
