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News Release

In this section of the Synopsys News Room, you'll find our news releases. The releases are listed in chronological order and are archived by year.

Archives: 2014 / 2013 / 2012 / 2011 / 2010 / 2009 / 2008 / 2007 / 2006 / 2005 / 2004 / 2003

2006 Archives

Dec 13, 2006
New Book Teaches Techniques to Develop an Effective SVA-Based Verification Strategy
Dec 11, 2006
Enhanced STARCAD-CEL Methodology Accelerates Time-to-Market for Major Japanese Semiconductor Companies
Dec 4, 2006
Synopsys Galaxy Design Platform and PrimeRail Deliver Complete Flow for Multi-threshold CMOS Design
Nov 21, 2006
Builds Electronic Design Automation Industry's First Supercomputer to Claim 242nd Spot on Top500 List
Nov 21, 2006
Simple Implementation and Predictable Results Were Key Drivers in Selection
Nov 20, 2006
Combination of Design and Verification Platforms With DesignWare® IP Meets Tight Area, Power and Performance Goals
Nov 20, 2006
Freescale Deploys VCS Native Testbench for SystemVerilog-Based Verification
Nov 7, 2006
IC Compiler Enables 10 Percent Die-Size Shrink and 2X Faster Turnaround Time
Oct 30, 2006
Complete Solution Will Include Memory Controller and Mixed-Signal PHY to Reduce Risk and Speed System Integration
Oct 25, 2006
Bridge Connects a Wealth of PCI Express Technology-Based Systems and Peripherals to AMBA 2.0 AHB Protocol-Based Designs
Oct 24, 2006
Link Will Help Accelerate Yield Ramp of High-Volume Production ICs
Oct 23, 2006
Comprehensive Test Flow Links Galaxy Platform With STAR Memory System
Oct 19, 2006
Tight Correlation Between Synthesis and Layout Reduces Time-to-Market
Oct 17, 2006
Significant Improvement in the Quality of At-Speed Testing Expected from Test Pattern Generation Based on Precise Timing
Oct 17, 2006
Expanded Collaboration Will Extend Saber Product Line Integration with UGS' NX MCAD and Teamcenter PLM Technology
Oct 16, 2006
Innovative Process-Aware DFM Product Family Enables Designers to Reduce Process Variability Impact and Improve Design for Advanced Semiconductor Manufacturing
Oct 11, 2006
Automated Power Network Prototyping Delivers Optimized Area and Layer Trade-offs
Oct 9, 2006
University to Receive World-Class Laboratory to Advance Education in Microelectronics Design
Oct 9, 2006
Synopsys JupiterXT and IC Compiler Tools Enable Die Size Optimization

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