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News Release

In this section of the Synopsys News Room, you'll find our news releases. The releases are listed in chronological order and are archived by year.

Archives: 2014 / 2013 / 2012 / 2011 / 2010 / 2009 / 2008 / 2007 / 2006 / 2005 / 2004 / 2003

2005 Archives

Dec 19, 2005
AMCC Deploys SystemVerilog Verification Environment With Synopsys' VCS® Native Testbench and Reference Verification Methodology
Dec 19, 2005
PSM Technology Enhances Lithography Resolution and Yield for High-Performance Products
Dec 14, 2005
Provides Complete Set of Standards-Based I/O Libraries for General Purpose and High-Performance Applications
Dec 7, 2005
DesignWare PHYs for Hi-Speed USB 2.0 and Hi-Speed USB OTG Developed with TSMC's Production-Proven 90-nm Libraries
Dec 6, 2005
Increased Predictability of Manufacturing Process through TCAD Lowers Product Development Cost and Time
Nov 28, 2005
IC Compiler Fits Easily in the Agere Flow, Delivers Higher Performance
Nov 21, 2005
Reference Design Flow Features Low Power Management and Design-for-Manufacturing Automation Capabilities
Nov 8, 2005
TetraMAX® ATPG Performance Speedup Combined with a New Waveform Debugger Streamline Test Pattern Generation for Complex Designs
Nov 7, 2005
Designers Benefit from Enhanced Productivity and Reduced Design Margins
Nov 7, 2005
Composite Current Source Model First to Combine Timing, Noise and Power
Nov 2, 2005
Combined Technology Can Read, Write and Provide On-The-Fly View of Compressed Files
Nov 1, 2005
DFT MAX Achieves 90% Test Data Volume Reduction for Flat Display TV Controller
Oct 31, 2005
Exar Develops and Deploys Advanced SystemVerilog Verification Environment and Reference Model with VCS® Native Testbench Technology
Oct 24, 2005
TetraMAX Diagnostics Enable TSMC to Accelerate Yield Ramp on Deep Submicron Designs
Oct 19, 2005
Advanced Testbench Techniques Critical for Multi-Protocol Verification Environment at Chip and System Levels
Oct 19, 2005
Project Methodology Leverages Assertions, Functional Coverage, Constrained-Random Stimulus Generation and PCI Express® Verification IP
Oct 17, 2005
Sentaurus Sets New Standard in TCAD Simulation Capabilities for Semiconductor Process, Device, Circuit and System Analysis, and Parametric Yield Optimization
Oct 10, 2005
Communications Leader Uses Synopsys' Tools and Flows From Design Through Physical Implementation

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