MOUNTAIN VIEW, Calif., April 23 /PRNewswire-FirstCall/ -- Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that its 19th electronic design automation (EDA) Interoperability Developers' Forum will be held on Thursday, April 26th in Santa Clara, Calif. It will feature discussions about open analog standards, the Unified Power Format (UPF) and Liberty™ library advancements. The Forum provides an open environment for EDA tool developers, IC design engineers and IP providers to discuss the critical topic of interoperability. Anyone who wants to attend is welcome.
The Forum's keynote address, titled, "Making Multicore Work and Measuring its Benefits," will be delivered by Markus Levy, president of the Embedded Microprocessor Benchmark Consortium (EEMBC) and the Multicore Association.
"Multicore technology offers immense opportunities for many facets of the embedded and high-performance computing industry," said Mr. Levy. "To realize multicore technology's potential for increased performance and reduced power consumption, significant design challenges related to power and inter-core communication must be addressed. I welcome the opportunity to present the latest news on multicore technology at this event."
The Forum will begin with the session, "The Power of One." Leading EDA vendors are using the industry-standard Unified Power Format (UPF) to enable fully interoperable low-power tool flows. This session will bring the audience up to speed on UPF's technical capabilities through a technical tutorial and panel discussion.
The general session will feature important new modeling innovations approved by the Liberty Technical Advisory Board (TAB) in December 2006, as well as insights into what is coming. Synopsys' R&D team will outline important new Library Compiler™ capabilities that help library developers and characterization tool suppliers ensure high-quality Composite Current Source (CCS) models by performing automated validation and closed-loop correlation checking. These new capabilities give users unsurpassed flexibility in delivering verified libraries at scaled voltage or temperature corners for tool flows from multiple vendors.
The Forum will culminate in a session focused on open, interoperable solutions for analog design. The need to improve analog design productivity and quality through the use of constraint-based analog EDA tools is driving the need for standardized constraints-sharing. The first half of the session will present the benefits and challenges of establishing an open constraint standard. The second half will consist of a panel discussion featuring the founding members and supporting companies of the recently announced Interoperable PCell Libraries (IPL) project.
"As the benefits of OpenAccess are starting to come to fruition in the design community, now is the time to focus on the next steps," said Jim Solomon, member of the board of directors at Ciranova. "Tool interoperability for analog design can be enabled by establishing standards in areas such as open analog constraints, open scripting language, and open Process Design Kits including Pcells. This Forum has become an invaluable venue for education, discussion and leadership centered on analog openness." Mr. Solomon is also on the boards of Silicon Navigator, Gemini Design Technology, Applied Wave Research, Nascentric, and Pyxis Technologies.
"Industry standards for low power and analog design continue to be pressing priorities for the design community," said Rich Goldman, vice president of Strategic Market Development at Synopsys. "This Forum demonstrates Synopsys' continued commitment to interoperability in our industry. All are invited to attend this collaborative event and participate in the discussion and exchange of information."
About the EDA Interoperability Developers' Forum
This Forum provides EDA vendors and their customers an opportunity to exchange information and ideas on EDA tool interoperability including new interface technologies, future enhancements, upcoming news and successes. For more information and to register, visit http://synopsys.com/news/events/devforums/2007/apr/index.html
Synopsys, Inc. (NASDAQ: SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.
Synopsys is a registered trademark of Synopsys, Inc. Liberty and Library Compiler are trademarks of Synopsys, Inc. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.
Rachel Modena Barasch
SOURCE: Synopsys, Inc.
CONTACT: Yvette Huygen of Synopsys, Inc., +1-650-584-4547,
firstname.lastname@example.org; or Rachel Modena Barasch of MCA, Inc., +1-650-325-7547,
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Web site: http://www.synopsys.com/