MOUNTAIN VIEW, Calif., Oct. 3, 2011 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP used in the design, verification and manufacture of electronic components and systems, today announced that its DesignWare® SuperSpeed USB 3.0 IP has surpassed 40 SoC design wins and more than 30 customer licensees worldwide. Because Synopsys' DesignWare USB 3.0 Digital Core and PHY IP has been broadly adopted by leading semiconductor companies targeting a variety of applications and process technologies, designers can be confident the IP is silicon-proven and can lower their SoC integration risk.

"In-Stat expects several hundred million USB 3.0-enabled devices will ship in 2012, including a large share of tablets, mobile and desktop PCs, external hard drives and flash drives," said Brian O'Rourke, research director at In-Stat. "By 2014, we expect many consumer electronics devices to transition to USB 3.0, including digital cameras, mobile phones and digital televisions. Overall, in 2014, we forecast that 1.4 billion USB 3.0 devices will ship. IP suppliers like Synopsys will help fuel this explosion in USB 3.0 adoption."

"Working with Synopsys for our USB 3.0 controller, HDMI controller and PHY IP helped us mitigate our project risk and reach volume production with our first-pass silicon," said Jonathan Jeacocke, vice president of engineering at DisplayLink. "In addition, we used Synopsys' HAPS® FPGA-based prototyping solution to build fully functional systems for at-speed testing of USB 3.0 and HDMI, including architecture validation, performance testing, software development and customer demonstrations. We've already started our next design with Synopsys' IP."

"We taped-out Synopsys' DesignWare USB 3.0 host and USB 3.0 device in three chips targeted at the digital home and PC peripheral markets, and all are now shipping in mass production," said Jessy Chen, executive vice president of Realtek Semiconductor Corporation. "We chose Synopsys DesignWare IP because of the company's excellent track record in USB 2.0. With Synopsys' USB 3.0 IP now fully certified and proven in our chips, we are certain we picked the right IP partner. We have been at the forefront of USB 3.0 development and integration, and have many innovative chips using Synopsys USB 3.0 IP coming in 2012."

Synopsys DesignWare SuperSpeed USB delivers more than 10x the data transfer rate of Hi-Speed USB (USB 2.0) and is backwards compatible with previous USB technologies, maintaining interoperability with more than three billion USB products in the market. Synopsys' complete DesignWare SuperSpeed USB 3.0 IP solution, comprised of xHCI host and device controllers, PHY and verification IP, delivers high performance in a compact footprint, making it ideal for mobile, home entertainment, computer, networking and automotive applications.

"As consumer demand grows, companies can add USB 3.0 to their products and rely on Synopsys for high-quality IP solutions that reduce integration risk," said John Koeter, vice president of marketing for IP and systems at Synopsys. "With more than 40 design wins and counting, the DesignWare SuperSpeed USB 3.0 IP is silicon-proven and extensively validated through customer use. Achieving this milestone reinforces Synopsys' reputation as a leading provider of high-quality IP that reduces interoperability risk and accelerates time-to-market."

Availability

The DesignWare SuperSpeed 3.0 USB xHCI host, device, dual-role device and hub controllers are available now. USB 3.0 reference drivers, transaction-level models for virtual prototyping and verification IP are also available now. The DesignWare SuperSpeed USB 3.0 PHY IP is available now in more than 12 process nodes from 130-nm to 28-nm. For more information on DesignWare USB IP, please visit: http://www.synopsys.com/usb or follow our blog at http://www.synopsysoc.org/usb-blog.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes complete interface IP solutions consisting of controllers, PHY and verification IP for widely used protocols, analog IP, embedded memories, logic libraries and configurable processor cores. In addition, Synopsys offers SystemC™ transaction-level models to build virtual prototypes for rapid, pre-silicon development of software. With a robust IP development methodology, reuse tools, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys' comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, system-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has approximately 70 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com.

Synopsys, DesignWare and HAPS are registered trademarks of Synopsys, Inc. SystemC is a trademark of the Open SystemC Initiative and is used under license. Any other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

Editorial Contacts:

Sheryl Gulizia
Synopsys, Inc.
650-584-8635
sgulizia@synopsys.com

Stephen Brennan
MCA, Inc.
650-968-8900 x114
sbrennan@macpr.com

SOURCE Synopsys, Inc.