Synopsys to Highlight Liberty and Composite Current Source at 16th EDA Interoperability Developers' Forum
PRNewswire-FirstCall
MOUNTAIN VIEW, Calif.

Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that it will highlight the industry standard, open-source Liberty™ library format at the 16th electronic design automation (EDA) Interoperability Developers' Forum. The Forum will be held on November 9, 2005 in Santa Clara, CA, and will feature a wide array of industry-wide EDA initiatives and standards. The event will provide sessions on: "Innovations in Open-Source Liberty Library Modeling," "Moving to Open EDA Databases," "Developing the SystemVerilog Ecosystem," and "V-SDC Open-Source Format for Equivalency Checking." The Forum's keynote address, entitled "Next Generation EDA," will be delivered by Jim Solomon, founder of Cadence, board member of numerous EDA companies, and the recipient of the 1997 Phil Kaufman Award for his contributions to EDA and design.

Innovations in Open-Source Liberty Library Modeling

At the Forum, Synopsys will highlight new extensions to the open-source Liberty library format that address modeling challenges at 90-nanometer (nm) and below. Leading semiconductor companies and IP vendors will also be sharing their experience with the adoption of the Composite Current Source (CCS) modeling.

Moving to Open EDA Databases

The event's morning session will feature presentations on the Milkyway™ database and on the migration to the OpenAccess environment for analog/custom design. The Synopsys MAP-in(SM) program will also announce details of a new upcoming release.

Developing the SystemVerilog Ecosystem

SystemVerilog adoption is in full swing and continues to accelerate. The Forum's afternoon session on "Developing the SystemVerilog Ecosystem" will relay the current status of the industry's ecosystem that is building around the highly productive industry standard SystemVerilog language. The session will also give a technical introduction to the Verification Methodology Manual for SystemVerilog, co-authored by ARM and Synopsys.

V-SDC Open-Source Format for Equivalency Checking

The Forum will include a technical presentation on the newly available V-SDC open-source format for equivalency checking. When verifying designs that have been optimized by implementation tools (such as synthesis), the intentional register and naming optimizations can make mapping the designs difficult. V-SDC provides a straightforward, reliable mechanism to communicate these changes. The V-SDC open-source format is available now through the Synopsys TAP-in(SM) Program. For more information about the TAP-in Program and to download the V-SDC User Guide, visit https://www.synopsys.com/community/interoperability-programs/tap-in.html .

"The design community benefits from open forums to discuss EDA interoperability based on proven databases and universal languages," said Rich Goldman, vice president of Strategic Market Development at Synopsys. "We are listening to our customers' and partners' requests for more interoperability initiatives as shown by our working with Si2's OpenAccess Coalition to advocate migration to an open environment for analog/custom design."

Registration and About the EDA Interoperability Developers' Forum

The EDA Interoperability Developers' Forum provides vendors and their customers an opportunity to exchange information and ideas on EDA tool interoperability including new interface technologies, future enhancements, upcoming news, and successes. For more information and to register, visit http://www.synopsys.com/news/events/devforums/2005/nov/.

About Synopsys

Synopsys, Inc. is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading semiconductor design and verification platforms and IC manufacturing software products to the global electronics market, enabling the development and production of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, California and has offices in more than 60 locations throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

NOTE: Synopsys is a registered trademark of Synopsys, Inc. Liberty and Milkyway are trademarks of Synopsys. Map-in and Tap-in are service trademarks of Synopsys. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

  Editorial Contacts:
   Renae Veiga
   Synopsys, Inc.
   650-584-1902
   renae@synopsys.com

   Khyati Shah
   Edelman
   650-429-2769
   khyati.shah@edelman.com

SOURCE: Synopsys, Inc.

CONTACT: Renae Veiga of Synopsys, Inc., +1-650-584-1902, or
renae@synopsys.com; or Khyati Shah of Edelman, +1-650-429-2769, or
khyati.shah@edelman.com, for Synopsys, Inc.

Web site: http://www.synopsys.com/